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EL7571
Data Sheet October 25, 2004 FN7298.1
Programmable PWM Controller
The EL7571 is a flexible, high efficiency, current mode, PWM step down controller. It incorporates five bit DAC adjustable output voltage control which conforms to the Intel Voltage Regulation Module (VRM) Specification for Pentium(R) II and Pentium(R) Pro class processors. The controller employs synchronous rectification to deliver efficiencies greater than 90% over a wide range of supply voltages and load conditions. The on-board oscillator frequency is externally adjustable, or may be slaved to a system clock, allowing optimization of RFI performance in critical applications. In single supply operation, the high side FET driver supports boot-strapped operation. For maximum flexibility, system operation is possible from either a 5V rail, a single 12V rail, or dual supply rails with the controller operating from 12V and the power FETs from 5V.
Features
* Pentium(R) II Compatible * 5 bit DAC Controlled Output Voltage * Greater than 90% Efficiency * 4.5V to 12.6V Input Range * Dual NMOS Power FET Drivers * Fixed frequency, Current Mode Control * Adjustable Oscillator with External Sync. Capability * Synchronous Switching * Internal Soft-Start * User Adjustable Slope Compensation * Pulse by Pulse Current Limiting * 1% Typical Output Accuracy
Pinout
R2 5 D1 C6 0.1F L2 Q1 C8 1F 3 COSC 1.4V C3 0.1F 5 PWRGD POWER GOOD 6 VIDO 7 VID1 Voltage I.D. (VID (0:4)) 8 VID2 9 VID3 10 VID4 VINP 16 LSD 15 GNDP 14 C7 1F Q2 D2 4 REF LX 18 VIN 17 C1 1.5H 1000 F x3 4.5V to 12.6V VOUT 1.3V to 3.5V C2 1000F x6
* Power Good Signal * Output Power Down * Over Voltage Protection * Pb-Free Available (RoHS Compliant)
ENABLE C3 240pF
1 OTEN 2 CSLOPE C3 240pF
VH1 20 HSD 19
Applications
* Pentium(R) II Voltage Regulation Modules (VRMs) * PC Motherboards * DC/DC Converters * GTL Bus Termination * Secondary Regulation
L1 5.1H
R2 5
GND 13 CS 12 FB 11
Ordering Information
PART NUMBER PACKAGE 20-Pin SO 20-Pin SO 20-Pin SO (Pb-free) 20-Pin SO (Pb-free) TAPE AND REEL 13" 13" PKG. DWG. # MDP0027 MDP0027 MDP0027 MDP0027
Q1, Q2: Siliconix, Si4410, x2 C1: Sanyo, 16MV 1000GX, 1000F x3 C2: Sanyo, 6MV 1000GX, 1000F x6 L1: Pulse Engineering, PE-53700, 5.1H L2: Micrometals, T30-26, 7T AWG #20, 1.5H R1: Dale, WSL-25-12, 15m, x2 D1: BAV99 D2: IR, 32CTQ030
EL7571CM EL7571CM-T13 EL7571CMZ (See Note) EL7571CMZ-T13 (See Note)
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020C.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2003-2004. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
EL7571
Absolute Maximum Ratings (TA = 25C)
Supply Voltage: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 14V Input Pin Voltage:. . . . . . . . . -.03 below Ground, +0.3 above Supply VHI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 27V Storage Temperature Range:. . . . . . . . . . . . . . . . . . 65C to +150C Operating Temperature Range: . . . . . . . . . . . . . . . . . . 0C to +70C Operating Junction Temperature:. . . . . . . . . . . . . . . . . . . . . . . 125C Peak Output Current: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3A Power Dissipation: . . . . . . . . . . . . . . . . . . . . . . . . . . . .SO20 500mW
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
DC Electrical Specifications
PARAMETER VIN VUVLO HI VUVLO LO VOUT RANGE VOUT 1 VOUT 2 VREF VILIM VIREV VOUT PG
TA = 25C, VIN = 5V, COSC = 330pF, CSLOPE = 390pF, RSENSE = 7.5m unless otherwise specified. CONDITION MIN 4.5 Positive going input voltage Negative going input voltage See VID table IL = 6.5A, VOUT = 2.8V IL = 6.5A, VOUT =1.8V 3.6 3.15 1.3 2.74 1.74 1.396 VILIM = (VCS-VFB) VIREV = (VCS-VFB) VOUT = 2.05V 125 -40 -18 8 +9 VIN = -10uA (VIN-1.5) 1.5 (VIN-1.5) 0.85 IOUT = 1mA VIN, VINP = 12V, IOUT = 100mA, (VHI-LX) = 12V 4.8 9.5 115 VOTEN>(VIN-0.5)V VOTEN<1.5V VIN,VINP = 12V, Measured at HSD, LSD, (VHI-LX) = 12V High Side Switch Active 1.2>VOSC>0.35V 1.2>VOSC>0.35V 8.5 1.2 0.76 2.5 14 50 2 25 20 2 1 0.5 6 2.82 1.81 1.41 154 -5 -14 12 +13 4 3.5 TYP MAX 12.6 4.4 3.85 3.5 2.90 1.9 1.424 185 20 -10 16 +17 1.5 UNIT V V V V V V V mV mV % % % V V V V VP-P V k k mA mA A A A mA A
DESCRIPTION Input Voltage Range Input Under Voltage Lock out Upper Limit Input Under Voltage Lock out Lower Limit Output Voltage Range Steady State Output Voltage Accuracy, VID = 10111 Steady State Output Voltage Accuracy, VID = 00101 Reference Voltage Current Limit Voltage Current Reversal Threshold Output Voltage Power Good Lower Level Output Voltage Power Good Upper Level
VOVP VOTEN LO VOTEN HI VID LO VID HI VOSC VPWRGD LO RDS ON RFB RCS IVIN IVIN DIS ISOURCE/SINK IRAMP IOSC CHARGE IOSC DISCHARGE IREFMAX
Over-Voltage Protection Threshold Power Down Input Low Level Power Down Input High Level Voltage I.D. Input Low Level Voltage I.D. Input High Level Oscillator Voltage Swing Power Good Output Low Level HSD, LSD Switch On-Resistance FB Input Impedance CS Input Impedance Quiescent Supply Current Supply Current in Output Disable Mode Peak Driver Output Current CSLOPE Ramp Current Oscillator Charge Current Oscillator Discharge Current VREF Output Current
2
EL7571
DC Electrical Specifications
PARAMETER IVID IOTEN TA = 25C, VIN = 5V, COSC = 330pF, CSLOPE = 390pF, RSENSE = 7.5m unless otherwise specified. (Continued) DESCRIPTION VID Input Pull up Current OTEN Input Pull up Current CONDITION MIN 3 3 TYP 5 5 MAX 7 7 UNIT A A
AC Electrical Specifications
PARAMETER fOSC fCLK tOTEN tSYNC TSTART DMAX
TA = 25C, VIN = 5V, COSC = 330pF, CSLOPE = 390pF unless otherwise specified. CONDITIONS COSC = 330pF MIN 140 50 VOTEN>1.5V Oscillator i/p (COSC) driven with HCMOS gate VOUT = 3.5V 20 100/fCLK 97 TYP 190 500 100 800 MAX 240 1000 UNIT kHz kHz ns ns us %
DESCRIPTION Nominal Oscillator Frequency Clock Frequency Shutdown Delay Oscillator Sync. Pulse Width Soft-start Period Maximum Duty Cycle
Pin Descriptions
PIN NO. 1 2 PIN NAME OTEN CSLOPE PIN TYPE (NOTE 1) I I FUNCTION Chip enable input, internal pull up (5mA typical). Active high. With a capacitor attached from CSLOPE to GND, generates the voltage ramp compensation for the PWM current mode controller. Slope rate is determined by an internal 14uA pull up and the CSLOPE capacitor value. VCSLOPE is reset to ground at the termination of the high side cycle. Multi-function pin: with a timing capacitor attached, sets the internal oscillator rate fS (kHz) = 57/COSC (F); when pulsed low for a duration tSYNC synchronizes device to an external clock. Band gap reference output. Decouple to GND with 0.1uF. Power good, open drain output. Set low whenever the output voltage is not within 13% of the programmed value. Bit 0 of the output voltage select DAC. Internal pull up sets input high when not driven. Bit 1 of the output voltage select DAC. Internal pull up sets input high when not driven. Bit 2 of the output voltage select DAC. Internal pull up sets input high when not driven. Bit 3 of the output voltage select DAC. Internal pull up sets input high when not driven. Bit 4 of the output voltage select DAC. Internal pull up sets input high when not driven. Voltage regulation feedback input. Tie to VOUT for normal operation. Current sense. Current feedback input of PWM controller and over current capacitor input. Current limit threshold set at +154mV with respect to FB. Connect sense resistor between CS and FB for normal operation. Ground Power ground for low side FET driver. Tie to GND for normal operation. Low side gate drive output. Input supply voltage for low side FET driver. Tie to VIN for normal operation. Input supply voltage for control unit. Negative supply input for high side FET driver. High side gate drive output. Driver ground referenced to LX. Driver supply may be bootstrapped to enhance low controller input voltage operation. Positive supply input for high side FET driver.
3 4 5 6 7 8 9 10 11 12
COSC REF PWRGD VID0 VID1 VID2 VID3 VID4 FB CS
I O O I I I I I I I
13 14 15 16 17 18 19 20
GND GNDP LSD VINP VIN LX HSD VH1
S S O S S S O S
NOTE: Pin designators: I = Input, O = Output, S = Supply
3
EL7571 Typical Performance Curves
+12V Supply Sync Line Regulation 0.004 0.003 0.002 0.001 0 -0.001 -0.002 -0.003 13.5 0.30 0.20 0.10 0.00 -0.10 -0.20 -0.30 -0.40 5.50 5V Supply Line Regulation
Line Regulation (%)
13.0
12.5
12.0
11.5
11.0
10.5
10.0
Line Regulation (%)
5.25
5.00 VIN (V)
4.75
4.50
VIN (V)
+12V Supply Sync Load Regulation 0.04 6.00 5.00 VOUT = 1.8V VOUT = 2.8V Load Regulation (%) VOUT = 2.1V 4.00 3.00 2.00 1.00 0 -0.01
VRM +5V Supply +12V Controller Sync w/o Schottky Load Regulation
0.03 Load Regulation (%)
0.02
0.01
VOUT = 2.8V VOUT = 3.5V VOUT = 1.3V
0
-1.00 VOUT = 1.8V -2.00 0 1 3 5 7 9 11 13 0 1 3 5 7 9 11 13 IOUT (A) IOUT (A)
-0.02
+5V Supply Non-Sync Load Regulation 5.00 4.00 VOUT = 1.3V Load Regulation (%) 3.00 Efficiency (%) VOUT = 1.8V 2.00 1.00 0 0.6 -1.00 -2.00 0 1 3 5 7 9 11 13 IOUT (A) 0.5 VOUT = 2.8V VOUT = 3.5V 0.8 0.9 1.0
+12V Supply Sync Efficiency
VOUT = 3.5V VOUT = 2.8V
0.7
VOUT = 1.8V
0
1
3
5
7
9
11
13
IOUT (A)
4
EL7571 Typical Performance Curves
+5V Supply Sync with Schottky Load 2.5 VOUT = 3.5V 0.9 VOUT = 2.8V 0.5 Efficiency (X) 0.8 VOUT = 3.5V 0.7 VOUT = 1.8V VOUT = 2.8V 0.6 VOUT = 1.3V 1.0
(Continued)
+5V Supply +12V Controller Sync w/o Schottky VRM Efficiency
1.5 Load Regulation (%)
0 VOUT = 1.8V VOUT = 1.3V
-0.5
-1.5
-2.5 0 1 3 5 7 IOUT (A) 9 11 13
0.5 0.02
1.02
3.04
5.04
7.04
9.04
11.04
13.04
IOUT (A)
+5V Supply Non-Sync VRM Efficiency 1.0 1.0
+5V Supply Sync with Schottky VRM Efficiency
0.9
0.9
Efficiency (%)
0.8 VOUT = 3.5V 0.7 VOUT = 2.8V VOUT = 1.8V 0.6 VOUT = 1.3V 0.5 0 1 3 5 7 IOUT (A) 9 11 13
Efficiency (%)
0.8 VOUT = 3.5V 0.7 VOUT = 2.8V VOUT = 1.8V 0.6 VOUT = 1.3V 0.5 0 1 3 5 7 IOUT (A) 9 11 13
12V Transient Response
5V Non-sync Transient Response
1
1
5
EL7571 Typical Performance Curves
5V Sync Transient Response
(Continued)
5V Input 12V Controller Transient Response
1
1
Efficiency vs Temperature 92.6 1.425 1.420 1.415 Efficiency (%) 92.4 VREF (V) 1.410 1.405 1.400 91.8 1.395
VREF vs Temperature
92.5
92.2
92.0
91.6 -45
-30
-15
0
15
30
45
60
1.390 -45
-30
-15
0
15
30
45
60
Temperature (C)
Temperature (C)
Frequency vs Temperature 280 270 260 Frequency (kHz) 250 240 230 220 210 200 -45
-30
-15
0
15
30
45
60
Temperature (C)
6
EL7571 Applications Information Circuit Description
General
The EL7571 is a fixed frequency, current mode, pulse width modulated (PWM) controller with an integrated high precision reference and a 5 bit Digital-to-Analog Converter (DAC). The device incorporates all the active circuitry required to implement a synchronous step down (buck) converter which conforms to the Intel Pentium(R) II VRM specification. Complementary switching outputs are provided to drive dual NMOS power FET's in either synchronous or non-synchronous configurations, enabling the user to realize a variety of high efficiency and low cost converters. resulting error voltage is compared with the compensating ramp and current feedback voltage. PWM duty cycle is adjusted by the comparator output such that the combined comparator input sums to zero. A weighted comparator scheme enhances system operation over traditional voltage error amplifier loops by providing cycle-by-cycle adjustment of the PWM output voltage, eliminating the need for error amplifier compensation. The dominant pole in the loop is defined by the output capacitance and equivalent load resistance, the effect of the output inductor having been canceled due to the current feedback. An output enable (OUTEN) input allows the regulator output to be disabled by an external logic control signal.
Auxiliary Comparators
The current feedback signal is monitored by two additional comparators which set the operating limits for the main inductor current. An over current comparator terminates the PWM cycle independently of the main summing comparator output whenever the voltage across the sense resistor exceeds 154mV. For a 7.5m resistor this corresponds to a nominal 20A current limit. Since output current is continuously monitored, cycle-by-cycle current limiting results. A second comparator senses inductor current reverse flow. The low side drive signal is terminated when the sense resistor voltage is less than -5mV, corresponding to a nominal reverse current of -0.67A, for a 7.5m sense resistor. Additionally, under fault conditions, with the regulator output over-voltage, inductor current is prevented from ramping to a high level in the reverse direction. This prevents the parasitic boost action of the local power supply when the fault is removed and potential damage to circuitry connected to the local supply.
Reference
A precision, temperature compensated band gap reference forms the basis of the EL7571. The reference is trimmed during manufacturing and provides 1% set point accuracy for the overall regulator. AC rejection of the reference is optimized using an external bypass capacitor CREF.
Main Loop
A current mode PWM control loop is implemented in the EL7571 (see block diagram). This configuration employs dual feedback loops which provide both output voltage and current feedback to the controller. The resulting system offers several advantages over tradititional voltage control systems, including simpler loop design, pulse by pulse current limiting, rapid response to line variaion and good load step response. Current feedback is performed by sensing voltage across an external shunt resistor. Selection of the shunt resistance value sets the level of current feedback and thereby the load regulation and current limit levels. Consequently, operation over a wide range of output currents is possible. The reference output is fed to a 5 bit DAC with step weighing conforming to the Intel VRM Specification. Each DAC input includes an internal current pull up which directly interfaces to the VID output of a Pentium(R) II class microprocessor. The heart of the controller is a triple-input direct summing differential comparator, which sums voltage feedback, current feedback and compensating ramp signals together. The relative gains of the comparator input stages are weighed. The ratio of voltage feedback to current feedback to compensating ramp defines the load regulation and open loop voltage gain for the system, respectively. The compensating ramp is required to maintain large system signal system stability for PWM duty cycles greater than 50%. Compensation ramp amplitude is user adjustable and is set with a single external capacitor (CSLOPE). The ramp voltage is ground referenced and is reset to ground whenever the high side drive signal is low. In operation, the DAC output voltage is compared to the regulator output, which has been internally attenuated. The
Oscillator
A system clock is generated by an internal relaxation oscillator. Operating frequency is simple to adjust using a single external capacitor COSC. The ratio of charge to discharge current in the oscillator is well defined and sets the maximum duty cycle for the system at around 96%.
Soft-start
During start-up, potentially large currents can flow into the regulator output capacitors due to the fast rate of change of output voltage caused during start-up, although peak inrush current will be limited by the over current comparator. However an additionally internal switch capacitor soft-start circuit controls the rate of change of output voltage during start-up by overriding the voltage feedback input of the main summing comparator, limiting the start-up ramp to around 1ms under typical operating conditions. The soft-start ramp is reset whenever the output enable (OUTEN) is reset or whenever the controller supply falls below 3.5V.
Watchdog
A system watchdog monitors the condition of the controller supply and the integrity of the generated output voltage.
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EL7571
Modern logic level power FET's rapidly increase in resistivity (RDS-ON) as their gate drive is reduced below 5V. To prevent thermal damage to the power FET's under load, with a reduced supply voltage, the system watchdog monitors the controller supply (VIN) and disables both PWM outputs (HSD, LSD) when the supply voltage drops below 3.5V. When the supply voltage is increased above 4V the watchdog initiates a soft-start ramp and enables PWM operation. The difference between enable and disable thresholds introduces hysteresis into the circuit operation, preventing start-up oscillation. In addition, output voltage is also monitored by the watchdog. As called out by the Intel Pentium(R) II VRM specification, the watchdog power good output (PWRGD) is set low whenever the output voltage differs from it's selected value by more than 13%. PWRGD is an open drain output. A third watchdog function disables PWM output switching during over-voltage fault conditions, displaying both external FET drives, whenever the output voltage is greater than 13% of its selected value, thereby anticipating reverse inductor current ramping and conforming to the VRM over-voltage specification, which requires the regulator output to be disabled during fault conditions. Switching is enabled after the fault condition is removed. level shift circuit. Each driver is capable of delivering nominal peak output currents of 2A at 12V. To prevent shoot-through in the external FET's, each driver is disabled until the gate voltage of the complementary power FET has fallen to less than 1V. Supply connections for both drivers are independent, allowing the controller to be configured with a boot-strapped high side drive. Employing this technique a single supply voltage may be used for both power FET's and controller. Alternatively, the application may be simplified using dual supply rails with the power FET's connected to a secondary supply voltage below the controller's, typically 12V and 5V. For applications where efficiency is less important than cost, applications can be further simplified by replacing the low side power FET with a Schottky diode, resulting in non-synchronous operation.
Applications Information
The EL7571 is designed to meet the Intel 5 bit VRM specification. Refer to the VID decode table for the controller output voltage range. The EL7571 may be used in a number converter topologies. The trade-off between efficiency, cost, circuit complexity, line input noise, transient response and availability of input supply voltages will determine which converter topology is suitable for a given application. The following table lists some of the differences between the various configurations:
Output Drivers
Complementary control signals developed by the PWM control loop are fed to dual NMOS power FET drivers via a
Converter Topologies
TOPOLOGY 5V only Non-synchronous 5V only Synchronous 5V &12V Non-synchronous 5V & 12V Synchronous 12V only Synchronous DIAGRAM figure 1 figure 2 figure 3 figure 4 Connection Diagram EFFICIENCY 92% 95% 92% 95% 92% COST low higher lowest high highest COMPLEXITY INPUT NOISE low higher lowest high highest high high high high high TRANSIENT RESPONSE good good good good best
Circuit schematics and Bills of Material (BOMs) for the various topologies are provided at the end of this data sheet. If your application requirements differ from the included samples, the following design guide lines should be used to select the key component values. Refer to the front page connection diagram for component locations.
Output Inductor, L1
Two key converter requirements are used to determine inductor value: * IMIN- minimum output current; the current level at which the converter enters the discontinuous mode of operation (refer to Elantec application note #18 for a detailed discussion of discontinuous mode) * IMAX- maximum output current
Although many factors influence the choice of the inductor value, including efficiency, transient response and ripple current, one practical way of sizing the inductor is to select a value which maintains continuous mode operation, i.e. inductor current positive for all conditions. This is desirable to optimize load regulation and light load transient response. When the minimum inductor ripple current just reaches zero and with the mean ripple current set to IMIN, peak inductor ripple current is twice IMAX, independent of duty cycle. The minimum inductor value is given by:
( V IN - V OUT ) x V OUT ( V IN - V OUT ) x T ON L 1MIN = ------------------------------------------------------- = ----------------------------------------------------------1 PEAK V IN x F SW x 2 x I MIN
8
EL7571
where: IPEAK = peak ripple current TON = top switch on time VIN = input voltage FSW = switching frequency VOUT = output voltage IMIN = minimum load Since inductance value tends to decrease with current, ripple current will generally be greater than 21MIN at higher output current. Once the minimum output inductance is determined, an off the shelf inductor with current rating greater than the maximum DC output required can be selected. Pulse Engineering and Coil Craft are two manufactures of high current inductors. For converter designers who want to design their own high current inductors, for experimental purposes or to further reduce costs, we recommend the Micrometals Powered Iron Cores data sheet and applications note as a good reference and starting point. where: VOCMIN = minimum over current voltage threshold IMAX = maximum output current Secondly, since the load current passes directly through the sense resistor, its power rating must be sufficient to handle the power dissipated during maximum load (current limit) conditions. Thus:
P D = 1 OUTMAX x R 1
2
current limiting. A resistor value must be selected which guarantees operation under maximum load. That is:
V OCMIN R 1 = ---------------------1 MAX
where: PD = power dissipated in current sense resistor PD must be less than the power rating of the current sense resistor. High current applications may require parallel sense resistors to dissipate sufficient power. Current Sense Resistor Table below lists some popular current sense resistors: the WLS-2512 series of Power Metal Strip Resistors from Dale Electronics, OARS series Iron Alloy resistor from IRC, and Copper Magnanin (CuNi) wire resistor from Mills Resistors. Mother board copper trace is not recommended because of its high temperature coefficient and low power dissipation. The trade-off between the different types of resistors are cost, space, packaging and performance. Although Power Metal Strip Resistors are relatively expensive, they are available in surface mount packaging with tighter tolerances. Consequently, less board space is used to achieve a more accurate current sense. Alternatively, Magnanin copper wire has looser tolerance and higher parasitic inductance. This results in a less current sense but at a much lower cost. Metal track on the PCB can also be used as current sense resistor. The trade-offs are 30% tolerance and 4000 ppm temperature coefficient. Ultimately, the selection of the type of current sense element must be made on an application by application basis.
Current Sense Resistor, R1
Inductor current is monitored indirectly via a low value resistor R1. The voltage developed across the current sense resistor is used to set the maximum operating current, the current reversal threshold and the system load regulation. To ensure reliable system operation it is important to sense the actual voltage drop across the resistor. Accordingly a four wire Kelvin connection should be made to the controller current sense inputs. There are two criteria for selecting the resistor value and type. Firstly, the minimum value is limited by the maximum output current. The EL7571 current limit capacitor has a typical threshold of 154mV, 125mV minimum. When the voltage across the sense resistor exceeds this threshold, the conduction cycle of the top switch terminates immediately, providing pulse by pulse
Bill of Materials
MANUFACTURER Dale IRC Mills Resistor PCB Trace Resistor PART NO. WSL 2512 OARS Series MRS1367-TBA TOLERANCE 1% 5% 10% 30% TEMPERATURE COEFFICIENT 75ppm 20ppm 20ppm 4000ppm POWER RATING 1W 1W - 5W 1.2W 50A/in (1oz Cu) PHONE NO. 402-563-6506 800-472-6467 916-422-5461 FAX NO. 402-563-6418 800-472-3282 906-422-1409
9
EL7571
Input Capacitor, C1
In a buck converter, where the output current is greater than 10A, significant demand is placed on the input capacitor. Under steady state operation, the high side FET conducts only when it is switched "on" and conducts zero current when it is turned "off". The result is a current square wave drawn from the input supply. Most of this input ripple current is supplied from the input capacitor C1. The current flow through C1's equivalent series resistance (ESR) can heat up the capacitor and cause premature failure. Maximum input ripple current occurs when the duty cycle is 50%, a current of IOUT/2 RMS. Worst case power dissipation is:
I OUT 2 P D = ------------ * ESR IN 2
(ESL) of the output capacitor in addition to the rate of change and magnitude of the load current step. The output voltage transient is given by:
d i V OUT = ESR OUT x I OUT + ESL x ---- d t
where: ESROUT = output capacitor ESR ESL = output capacitor ESL IOUT = output current step di/dt = rate of change of output current
Power MOSFET, Q1 and Q2
The EL7571 incorporates a boot-strap gate drive scheme to allow the usage of N-channel MOSFETs. N-channel MOSFETs are preferred because of their relative low cost and low on resistance. The largest amount of the power loss occurs in the power MOSFETs, thus low on resistance should be the primary characteristic when selecting power MOSFETs. In the boot-strap gate drive scheme, the gate drive voltage can only go as high as the supply voltage, therefore in a 5V system, the MOSFETs must be logic level type, VGS<4.5V. In addition to on resistance and gate to source threshold, the gate to source capacitance is also very important. In the region when the output current is low (below 5A), switching loss is the dominant factor. Switching loss is determined by:
P = CxV xF
2
where: ERSIN = input capacitor ESR For safe and reliable operation, PD must be less than the capacitor's data sheet rating.
Input Inductor, L2
The input inductor (L2) isolates switching noise from the input supply line by diverting buck converter input ripple current into the input capacitor. Buck regulators generate high levels of input ripple current because the load is connected directly to the supply through the top switch every cycle, chopping the input current between the load current and zero, in proportion to the duty cycle. The input inductor is critical in high current applications where the ripple current is similarly high. An exclusively large input inductor degrades the converter's load transient response by limiting the maximum rate of change of current at the converter input. A 1.5H input inductor is sufficient in most applications.
where: C is the gate to source capacitance of the MOSFET V is the supply voltage F is the switching frequency Another undesirable reason for a large MOSFET gate to source capacitance is that the on resistance of the MOSFET driver can not supply the peak current required to turn the MOSFET on and off fast. This results in additional MOSFET conduction loss. As frequency increases, this loss also increases which leads to more power loss and lower efficiency. Finally, the MOSFET must be able to conduct the maximum current and handle the power dissipation. The EL7571 is designed to boot-strap to 12V for 12V only input converters. In this application, logic level MOSFETs are not required. The following table below lists a few popular MOSFETs and their critical specifications.
Output Capacitor, C2
During steady state operation, output ripple current is much less than the input ripple current since current flow is continuous, either via the top switch or the bottom switch. Consequently, output capacitor power dissipation is less of a concern than the input capacitor's. However, low ESR is still required for applications with very low output ripple voltage or transient response requirements. Output ripple voltage is given by:
V RIP = I RIP x ESR OUT
where: IRIP = output ripple current ESROUT = output capacitor ESR During a transient response, the output voltage spike is determined by the ESR and the equivalent series inductance
10
EL7571
MANUFACTURER MegaMos MegaMos Siliconix Fuji IR Motorola
MODEL Mi4410 Mip30N03A Si4410 2SK1388 IRF3205S MTB75N05HD
VGS 4.5V 4.5V 4.5V 4V 4 4
RON (MAX) 20m 22m 20m 37m 8m 7m
CGS 6.4nF 6.3nF 4.3nF
ID 10A 15A 10A 17.5A
VDS 30V 30V 30V
PACKAGE SO-8 TO-220 SO-8 TO-220
17nF (max) 7.1nF
98A 75A
55V 50V
D2Pak TO-220
Skottky Diode, D2
In the non-synchronous scheme a flyback diode is required to provide a current path to the output when the high side power MOSFET, Q1, is switched off. The critical criteria for selecting D2 is that it must have low forward voltage drop.
The product of forward voltage drop and condition current is a primary source of power dissipation in the convertor. The Schottky diode selected is the International Rectifier 32CTQ030 which has 0.4V of forward voltage drop at 15A.
Block Diagram
In Regulation ENABLE
1.5H L2 4.5V to 12.6V C1 3mF VIN OTEN
0.1F REF FB CS + Reference + 4V + + 3.5V + DAC + + CSLOPE Ramp Control Soft Start ENABLE COSC PWM Control Logic LSD 5.1H L1 7.5m VOUT C2 6mF UVLO LOW UVLO HI + Current Reversal HSD VHI PWRGD VINP
0.1F LX
VID (0:4)
240pF
Oscillator
220pF GND GNDP
11
EL7571 Voltage ID Code Output Voltage Settings
VID4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VID3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 VID2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 VID1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 VID0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 VOUT 1.3 1.35 1.4 1.45 1.5 1.55 1.6 1.65 1.7 1.75 1.8 1.85 1.9 1.95 2.0 2.05 0, No CPU 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5
Application Circuits
To assist the evaluation of EL7571, several VRM applications have been developed. These are described in the converter topologies table earlier in the data sheet. The demo board can be configured to operate with either a 5V or 12V controller supply, using a 5V FET supply.
12
EL7571 5V Input, Boot-Strapped Non-Synchronous DC:DC Converter
5 R2 D1
ENABLE 240pF
1
OTEN
VH1 20 0.1F
C6
1H 2 CSLOPE HSD 19 Q1 C8 3 COSC LX 18 1F C1 1000F x3 VOUT L1 C7 5 PWRGD VINP 16 0.1F 6 VIDO LSD 15 D2 5.1H R1 7.5m C2 1000F x6 L2 5V
C3 C4 220pF 1.4V C5 0.1F POWER GOOD 4 REF V1H 17
7
VID1
GNDP 14
8 Voltage LD. (VID(0:4))
VID2
GND
13
9
VID3
CS 12
10 VID4
FB 11
EL7571 5V VRM Bill of Materials - 5V Non Sync Solution
COMPONENT C1 C2 C3 C4 C5, C6 C7, C8 D1 IC1 L1 L2 R1 R2 D2 Q1 IR Siliconix GI Elantec Pulse Engineering Micrometals DALE MANUFACTURER Sanyo Sanyo PART NUMBER 6MV1000GX 6MV1000GX Chip Capacitors Chip Capacitors Chip Capacitors Chip Capacitors Schotty diode SS12GICT-ND EL7571CM PE-53700 T30-26,7T AWG #20 WSL-2512 Chip Resistor IR32CTQ030 Si4410 5.1H 1H 15m 5 VALUE 1000F 1000F 240pF 220pF 0.1F 1F UNIT 3 6 1 1 2 2 1 1 1 1 2 1 1 2
13
EL7571 5V Input Boot-Strapped Synchronous DC:DC Converter
R2 D1 C6 0.1F 1.5H 2 C3 C4 3 220pF 1.4V C5 0.1F POWER GOOD 6 VIDO LSD 15 Q2 7 VID1 GNDP 14 C7 5 PWRGD VINP 16 0.1F D2 4 REF V1H 17 L1 5.1H R1 7.5m VOUT C2 1000F x6 COSC LX 18 CSLOPE HSD 19 Q1 C8 1F C1 1000F x3 L2 5V 5
ENABLE 240pF
1
OTEN
VH1 20
8 Voltage LD. (VID(0:4))
VID2
GND
13
9
VID3
CS 12
10 VID4
FB 11
EL7571 5V VRM Bill of Materials - 5V Non Sync Solution
COMPONENT C1 C2 C3 C4 C5, C6 C7, C8 D1 IC1 L1 L2 R1 R2 D2 Q1, Q2 IR Siliconix GI Elantec Pulse Engineering Micrometals DALE MANUFACTURER Sanyo Sanyo PART NUMBER 6MV1000GX 6MV1000GX Chip Capacitors Chip Capacitors Chip Capacitors Chip Capacitors Schotty diode SS12GICT-ND EL7571CM PE-53700 T30-26,7T AWG #20 WSL-2512 Chip Resistor IR32CTQ030 Si4410 5.1H 1H 15m 5 VALUE 1000F 1000F 240pF 220pF 0.1F 1F UNIT 3 6 1 1 2 2 1 1 1 1 2 1 1 2 each
14
EL7571 5V Input, 12V Controller, Non-Sync Solution
12V 5 ENABLE 220pF 2 C3 C4 3 220pF 1.4V C5 0.1F POWER GOOD 6 VIDO LSD 15 Q2 7 VID1 GNDP 14 C7 5 PWRGD VINP 16 0.1F 4 REF V1H 17 L1 5.1H R1 7.5m VOUT C2 1000F x6 COSC LX 18 CSLOPE HSD 19 Q1 C8 1F C1 L2 5V 1000F x3 1 OTEN VH1 20 R2 1H
8 Voltage LD. (VID(0:4))
VID2
GND
13
9
VID3
CS 12
10 VID4
FB 11
EL7571 5V VRM Bill of Materials - 5V Non Sync Solution
COMPONENT C1 C2 C3 C4 C5 C7, C8 IC1 L1 L2 R1 R2 D2 Q1 IR Siliconix Elantec Pulse Engineering Micrometals DALE MANUFACTURER Sanyo Sanyo PART NUMBER 6MV1000GX 6MV1000GX Chip Capacitors Chip Capacitors Chip Capacitors Chip Capacitors EL7571CM PE-53700 T30-26,7T AWG #20 WSL-2512 Chip Resistor IR32CTQ030 Si4410 5.1H 1H 15m 5 VALUE 1000F 1000F 240pF 220pF 0.1F 1F UNIT 3 6 1 1 1 2 1 1 1 2 1 1 2
15
EL7571 5V Input, 12V Controller, Synchronous DC:DC Converter
C6 0.1F ENABLE 330pF 2 C3 C4 3 330pF 1.4V C5 0.1F POWER GOOD 6 VIDO LSD 15 C7 5 PWRGD VINP 16 0.1F D2 4 REF V1H 17 L1 5.1H R1 7.5m VOUT C2 1000F x6 COSC LX 18 CSLOPE HSD 19 Q1 C8 1F C1 L2 5V 1000F x3 1 OTEN VH1 20 1.5H 12V
7
VID1
GNDP 14
8 Voltage LD. (VID(0:4))
VID2
GND
13
9
VID3
CS 12
10 VID4
FB 11
EL7571 5V VRM Bill of Materials - 5V Input, 12V Controller Sync Solution
COMPONENT C1 C2 C3 C4 C5, C6 C7, C8 IC1 L1 L2 R1 D2 Q1, Q2 Elantec Pulse Engineering Micrometals DALE IR Siliconix MANUFACTURER Sanyo Sanyo PART NUMBER 6MV1000GX 6MV1000GX Chip Capacitors Chip Capacitors Chip Capacitors Chip Capacitors EL7571CM PE-53700 T30-26,7T AWG #20 WSL-2512 IR32CTQ030 Si4410 5.1H 1H 15m VALUE 1000F 1000F 330pF 330pF 0.1F 1F UNIT 3 6 1 1 2 2 1 1 1 2 1 2 each
16
EL7571
PCB Layout Considerations
1. Place the power MOSFET's as close to the controller as possible. Failure to do so will cause large amounts of ringing due to the parasitic inductance of the copper trace. Additionally, the parasitic capacitance of the trace will weaken the effective gate drive. High frequency switching noise may also couple to other control lines. 2. Always place the by-pass capacitors (0.1F and 1F) as close to the EL7571 as possible. Long lead lengths will lessen the effectiveness. 3. Separate the power ground (input capacitor ground and ground connections of the Schottky diode and the power MOSFET's) and signal grounds (ground pins of the bypass capacitors and ground terminals of the EL7571). This will isolate the highly noisy switching ground from the very sensitive signal ground. 4. Connect the power and signal grounds at the output capacitors. Output capacitor ground is the quietest point in the converter and should be used as the reference ground. 5. The power MOSFET's output inductor and Schottky diode should be grouped together to contain high switching noise in the smallest area. 6. Current sense traces running from pin 11 and pin 12 to the current sense resistor should run parallel and close to each other and be Kelvin connected (no high current flow). In high current applications performance can be improved by connecting low Pass filter (typical values 4.7, 0.1F) between the sense resistor and the IC inputs.
Layout Example
To demonstrate the points discussed above, below shows two reference layouts - a synchronous 5V only VRM layout and a synchronous 5V only PC board layout. Both layouts can be modified to any application circuit configuration shown on this data sheet. Gerber files of the layouts are available from the factory.
Top Layer Silkscreen
Bottom Layer Silkscreen
17
EL7571
Top Layer Metal
Bottom Layer Metal
Top Layer Silkscreen
18
EL7571
Top Layer Metal
Bottom Layer Metal
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